Design Verification Engineer Job at VDart Inc, Washington DC

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  • VDart Inc
  • Washington DC

Job Description

Design Verification Engineer

Bellevue - Washington (Onsite)

Contract

  • Plan develop and implement comprehensive testbenches in SystemVerilog to validate RTL module functionality across various scenarios
  • Execute testbenches consistently identifying and documenting potential issues and bugs discovered during simulation
  • Perform RTL simulations using tools like ModelSim or QuestaSim to verify design accuracy and troubleshoot errors
  • Interpret and analyze state machine and module implementations from RTL code to identify various scenarios for targeted testing
  • Utilize shellbash scripting to streamline and automate the test execution process enhancing workflow efficiency
  • Conduct detailed RTL code reviews in alignment with model diagrams offering constructive feedback to improve design fidelity
  • Actively participate in design review meetings contributing insights and recommendations to ensure robust design architecture

Job Tags

Contract work,

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